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Product documentation and design flow

The CoreSight™ SoC-400 design and validation workflow includes the design of the SoC and testbench, configuration and integration of the CoreSight components, and execution of your test code in the testbench.

  • For information about designing a debug and trace sub system, see the ARM® CoreSight™ SoC‑400 System Design Guide (SDG) and the ARM® CoreSight™ Architecture Specification (AS).

  • For instructions on how to configure and integrate the components, see the ARM® CoreSight™ SoC‑400 Integration Manual (IM).

  • For instructions on how to validate the debug and trace features of your design, see the ARM® CoreSight™ SoC‑400 User Guide (UG).

  • For instructions on how to perform synthesis on your CoreSight system, see the ARM® CoreSight™ SoC‑400 Implementation Guide (IG).

Note

The SDG, AS, IM, UG, and IG are confidential books that are only available to licensees.

The validation flow works with your existing SoC testbench. The validation modules, such as the cxdt, can be instantiated at the testbench level. This makes it possible to accommodate the validation flow without any modification to your SoC under test.

The following figure shows how you can design, implement, and validate the debug and trace components in a SoC that contains one or more ARM processors:

Figure 1-2 Design and validation workflow with CoreSight SoC-400


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