You copied the Doc URL to your clipboard.

Arm Cortex‑A76 Core Technical Reference Manual : Main functions

Main functions

The three main functions of the MMU are to:

  • Control the table walk hardware that accesses translation tables in main memory.
  • Translate Virtual Addresses (VAs) to Physical Addresses (PAs).
  • Provide fine-grained memory system control through a set of virtual-to-physical address mappings and memory attributes that are held in translation tables.

Each stage of address translation uses a set of address translations and associated memory properties that are held in memory mapped tables called translation tables. Translation table entries can be cached into a Translation Lookaside Buffer (TLB).

The following table describes the components included in the MMU.

Table A5-1 TLBs and TLB caches in the MMU

Component Description
Instruction L1 TLB 48 entries, fully associative.
Data L1 TLB 48 entries, fully associative.
L2 TLB cache 1280 entries, 5-way set associative.
Translation table prefetcher Detects access to contiguous translation tables and prefetches the next one. This prefetcher can be disabled in the ECTLR register.

The TLB entries contain either one or both of a global indicator and an Address Space Identifier (ASID) to permit context switches without requiring the TLB to be invalidated.

The TLB entries contain a Virtual Machine Identifier (VMID) to permit virtual machine switches by the hypervisor without requiring the TLB to be invalidated.

Was this page helpful? Yes No