You copied the Doc URL to your clipboard.

Arm Cortex‑A76 Core Technical Reference Manual : Part B Register descriptions

Part B Register descriptions

Table of Contents

AArch32 system registers
AArch32 architectural system register summary
AArch64 system registers
AArch64 registers
AArch64 architectural system register summary
AArch64 implementation defined register summary
AArch64 registers by functional group
ACTLR_EL1, Auxiliary Control Register, EL1
ACTLR_EL2, Auxiliary Control Register, EL2
ACTLR_EL3, Auxiliary Control Register, EL3
AFSR0_EL1, Auxiliary Fault Status Register 0, EL1
AFSR0_EL2, Auxiliary Fault Status Register 0, EL2
AFSR0_EL3, Auxiliary Fault Status Register 0, EL3
AFSR1_EL1, Auxiliary Fault Status Register 1, EL1
AFSR1_EL2, Auxiliary Fault Status Register 1, EL2
AFSR1_EL3, Auxiliary Fault Status Register 1, EL3
AIDR_EL1, Auxiliary ID Register, EL1
AMAIR_EL1, Auxiliary Memory Attribute Indirection Register, EL1
AMAIR_EL2, Auxiliary Memory Attribute Indirection Register, EL2
AMAIR_EL3, Auxiliary Memory Attribute Indirection Register, EL3
CCSIDR_EL1, Cache Size ID Register, EL1
CLIDR_EL1, Cache Level ID Register, EL1
CPACR_EL1, Architectural Feature Access Control Register, EL1
CPTR_EL2, Architectural Feature Trap Register, EL2
CPTR_EL3, Architectural Feature Trap Register, EL3
CPUACTLR_EL1, CPU Auxiliary Control Register, EL1
CPUACTLR2_EL1, CPU Auxiliary Control Register 2, EL1
CPUCFR_EL1, CPU Configuration Register, EL1
CPUECTLR_EL1, CPU Extended Control Register, EL1
CPUPCR_EL3, CPU Private Control Register, EL3
CPUPMR_EL3, CPU Private Mask Register, EL3
CPUPOR_EL3, CPU Private Operation Register, EL3
CPUPSELR_EL3, CPU Private Selection Register, EL3
CPUPWRCTLR_EL1, Power Control Register, EL1
CSSELR_EL1, Cache Size Selection Register, EL1
CTR_EL0, Cache Type Register, EL0
DCZID_EL0, Data Cache Zero ID Register, EL0
DISR_EL1, Deferred Interrupt Status Register, EL1
ERRIDR_EL1, Error ID Register, EL1
ERRSELR_EL1, Error Record Select Register, EL1
ERXADDR_EL1, Selected Error Record Address Register, EL1
ERXCTLR_EL1, Selected Error Record Control Register, EL1
ERXFR_EL1, Selected Error Record Feature Register, EL1
ERXMISC0_EL1, Selected Error Record Miscellaneous Register 0, EL1
ERXMISC1_EL1, Selected Error Record Miscellaneous Register 1, EL1
ERXPFGCDNR_EL1, Selected Error Pseudo Fault Generation Count Down Register, EL1
ERXPFGCTLR_EL1, Selected Error Pseudo Fault Generation Control Register, EL1
ERXPFGFR_EL1, Selected Pseudo Fault Generation Feature Register, EL1
ERXSTATUS_EL1, Selected Error Record Primary Status Register, EL1
ESR_EL1, Exception Syndrome Register, EL1
ESR_EL2, Exception Syndrome Register, EL2
ESR_EL3, Exception Syndrome Register, EL3
HACR_EL2, Hyp Auxiliary Configuration Register, EL2
HCR_EL2, Hypervisor Configuration Register, EL2
ID_AA64AFR0_EL1, AArch64 Auxiliary Feature Register 0
ID_AA64AFR1_EL1, AArch64 Auxiliary Feature Register 1
ID_AA64DFR0_EL1, AArch64 Debug Feature Register 0, EL1
ID_AA64DFR1_EL1, AArch64 Debug Feature Register 1, EL1
ID_AA64ISAR0_EL1, AArch64 Instruction Set Attribute Register 0, EL1
ID_AA64ISAR1_EL1, AArch64 Instruction Set Attribute Register 1, EL1
ID_AA64MMFR0_EL1, AArch64 Memory Model Feature Register 0, EL1
ID_AA64MMFR1_EL1, AArch64 Memory Model Feature Register 1, EL1
ID_AA64MMFR2_EL1, AArch64 Memory Model Feature Register 2, EL1
ID_AA64PFR0_EL1, AArch64 Processor Feature Register 0, EL1
ID_AA64PFR1_EL1, AArch64 Processor Feature Register 1, EL1
ID_AFR0_EL1, AArch32 Auxiliary Feature Register 0, EL1
ID_DFR0_EL1, AArch32 Debug Feature Register 0, EL1
ID_ISAR0_EL1, AArch32 Instruction Set Attribute Register 0, EL1
ID_ISAR1_EL1, AArch32 Instruction Set Attribute Register 1, EL1
ID_ISAR2_EL1, AArch32 Instruction Set Attribute Register 2, EL1
ID_ISAR3_EL1, AArch32 Instruction Set Attribute Register 3, EL1
ID_ISAR4_EL1, AArch32 Instruction Set Attribute Register 4, EL1
ID_ISAR5_EL1, AArch32 Instruction Set Attribute Register 5, EL1
ID_ISAR6_EL1, AArch32 Instruction Set Attribute Register 6, EL1
ID_MMFR0_EL1, AArch32 Memory Model Feature Register 0, EL1
ID_MMFR1_EL1, AArch32 Memory Model Feature Register 1, EL1
ID_MMFR2_EL1, AArch32 Memory Model Feature Register 2, EL1
ID_MMFR3_EL1, AArch32 Memory Model Feature Register 3, EL1
ID_MMFR4_EL1, AArch32 Memory Model Feature Register 4, EL1
ID_PFR0_EL1, AArch32 Processor Feature Register 0, EL1
ID_PFR1_EL1, AArch32 Processor Feature Register 1, EL1
ID_PFR2_EL1, AArch32 Processor Feature Register 2, EL1
LORC_EL1, LORegion Control Register, EL1
LORID_EL1, LORegion ID Register, EL1
LORN_EL1, LORegion Number Register, EL1
MDCR_EL3, Monitor Debug Configuration Register, EL3
MIDR_EL1, Main ID Register, EL1
MPIDR_EL1, Multiprocessor Affinity Register, EL1
PAR_EL1, Physical Address Register, EL1
REVIDR_EL1, Revision ID Register, EL1
RMR_EL3, Reset Management Register
RVBAR_EL3, Reset Vector Base Address Register, EL3
SCTLR_EL1, System Control Register, EL1
SCTLR_EL2, System Control Register, EL2
SCTLR_EL3, System Control Register, EL3
TCR_EL1, Translation Control Register, EL1
TCR_EL2, Translation Control Register, EL2
TCR_EL3, Translation Control Register, EL3
TTBR0_EL1, Translation Table Base Register 0, EL1
TTBR0_EL2, Translation Table Base Register 0, EL2
TTBR0_EL3, Translation Table Base Register 0, EL3
TTBR1_EL1, Translation Table Base Register 1, EL1
TTBR1_EL2, Translation Table Base Register 1, EL2
VDISR_EL2, Virtual Deferred Interrupt Status Register, EL2
VDISR_EL2 at EL1 using AArch64
VSESR_EL2, Virtual SError Exception Syndrome Register
VTCR_EL2, Virtualization Translation Control Register, EL2
VTTBR_EL2, Virtualization Translation Table Base Register, EL2
Error system registers
Error system register summary
ERR0ADDR, Error Record Address Register
ERR0CTLR, Error Record Control Register
ERR0FR, Error Record Feature Register
ERR0MISC0, Error Record Miscellaneous Register 0
ERR0MISC1, Error Record Miscellaneous Register 1
ERR0PFGCDNR, Error Pseudo Fault Generation Count Down Register
ERR0PFGCTLR, Error Pseudo Fault Generation Control Register
ERR0PFGFR, Error Pseudo Fault Generation Feature Register
ERR0STATUS, Error Record Primary Status Register
GIC registers
CPU interface registers
AArch64 physical GIC CPU interface system register summary
ICC_AP0R0_EL1, Interrupt Controller Active Priorities Group 0 Register 0, EL1
ICC_AP1R0_EL1, Interrupt Controller Active Priorities Group 1 Register 0 EL1
ICC_BPR0_EL1, Interrupt Controller Binary Point Register 0, EL1
ICC_BPR1_EL1, Interrupt Controller Binary Point Register 1, EL1
ICC_CTLR_EL1, Interrupt Controller Control Register, EL1
ICC_CTLR_EL3, Interrupt Controller Control Register, EL3
ICC_SRE_EL1, Interrupt Controller System Register Enable Register, EL1
ICC_SRE_EL2, Interrupt Controller System Register Enable register, EL2
ICC_SRE_EL3, Interrupt Controller System Register Enable register, EL3
AArch64 virtual GIC CPU interface register summary
ICV_AP0R0_EL1, Interrupt Controller Virtual Active Priorities Group 0 Register 0, EL1
ICV_AP1R0_EL1, Interrupt Controller Virtual Active Priorities Group 1 Register 0, EL1
ICV_BPR0_EL1, Interrupt Controller Virtual Binary Point Register 0, EL1
ICV_BPR1_EL1, Interrupt Controller Virtual Binary Point Register 1, EL1
ICV_CTLR_EL1, Interrupt Controller Virtual Control Register, EL1
AArch64 virtual interface control system register summary
ICH_AP0R0_EL2, Interrupt Controller Hyp Active Priorities Group 0 Register 0, EL2
ICH_AP1R0_EL2, Interrupt Controller Hyp Active Priorities Group 1 Register 0, EL2
ICH_HCR_EL2, Interrupt Controller Hyp Control Register, EL2
ICH_VMCR_EL2, Interrupt Controller Virtual Machine Control Register, EL2
ICH_VTR_EL2, Interrupt Controller VGIC Type Register, EL2
Advanced SIMD and floating-point registers
AArch64 register summary
FPCR, Floating-point Control Register
FPSR, Floating-point Status Register
MVFR0_EL1, Media and VFP Feature Register 0, EL1
MVFR1_EL1, Media and VFP Feature Register 1, EL1
MVFR2_EL1, Media and VFP Feature Register 2, EL1
AArch32 register summary
FPSCR, Floating-Point Status and Control Register
Was this page helpful? Yes No