RMR_EL3, Reset Management Register
The RMR_EL3 controls the execution state that the core boots into and allows request of a Warm reset.
Bit field descriptions
RMR_EL3 is a 32-bit register, and is part of the Reset management registers functional group.
Figure B2-72 RMR_EL3 bit assignments
- RES0, [31:2]
- RR, 
Reset Request. The possible values are:
This is the reset value on both a Warm and a Cold reset.
Requests a Warm reset.
The bit is strictly a request.
- RES1, 
There are no configuration notes.
Details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.