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Arm Cortex‑A76 Core Technical Reference Manual : VTTBR_EL2, Virtualization Translation Table Base Register, EL2

VTTBR_EL2, Virtualization Translation Table Base Register, EL2

VTTBR_EL2 holds the base address of the translation table for the stage 2 translation of memory accesses from Non-secure EL0 and EL1.

Bit field descriptions

VTTBR_EL2 is a 64-bit register.

Figure B2-87 VTTBR_EL2 bit assignments


CnP, [0]

Common not Private. The possible values are:

0CnP is not supported.
1

CnP is supported.

Configurations
There are no configuration notes.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
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