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Arm Cortex‑A76 Core Technical Reference Manual : ERR0ADDR, Error Record Address Register

ERR0ADDR, Error Record Address Register

The ERR0ADDR stores the address that is associated to an error that is recorded.

Bit field descriptions

ERR0ADDR is a 64-bit register, and is part of the Reliability, Availability, Serviceability (RAS) registers functional group.

Figure B3-1 ERR0ADDR bit assignments


NS, [63]

Non-secure attribute. The possible values are:

0The physical address is Secure.
1The physical address is Non-secure.
RES0, [62:40]
RES0Reserved.
PADDR, [39:0]

Physical address.

Configurations

ERR0ADDR resets to UNKNOWN.

When ERRSELR.SEL==0, this register is accessible from ERXADDR_EL1, Selected Error Record Address Register, EL1.

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