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Debug over powerdown

The Cortex®‑A76 core supports debug over powerdown, which allows a debugger to retain its connection with the core even when powered down. This enables debug to continue through powerdown scenarios, rather than having to re-establish a connection each time the core is powered up.

The debug over powerdown logic is part of the DebugBlock, which is external to the cluster, and must remain powered on during the debug over powerdown process.

See the Arm® DynamIQ™ Shared Unit Technical Reference Manual.

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