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Part D Debug registers

Table of Contents

AArch32 debug registers
AArch32 debug register summary
AArch64 debug registers
AArch64 debug register summary
DBGBCRn_EL1, Debug Breakpoint Control Registers, EL1
DBGCLAIMSET_EL1, Debug Claim Tag Set Register, EL1
DBGWCRn_EL1, Debug Watchpoint Control Registers, EL1
Memory-mapped debug registers
Memory-mapped debug register summary
EDCIDR0, External Debug Component Identification Register 0
EDCIDR1, External Debug Component Identification Register 1
EDCIDR2, External Debug Component Identification Register 2
EDCIDR3, External Debug Component Identification Register 3
EDDEVID, External Debug Device ID Register 0
EDDEVID1, External Debug Device ID Register 1
EDPIDR0, External Debug Peripheral Identification Register 0
EDPIDR1, External Debug Peripheral Identification Register 1
EDPIDR2, External Debug Peripheral Identification Register 2
EDPIDR3, External Debug Peripheral Identification Register 3
EDPIDR4, External Debug Peripheral Identification Register 4
EDPIDRn, External Debug Peripheral Identification Registers 5-7
EDRCR, External Debug Reserve Control Register
AArch32 PMU registers
AArch32 PMU register summary
PMCEID0, Performance Monitors Common Event Identification Register 0
PMCEID1, Performance Monitors Common Event Identification Register 1
PMCR, Performance Monitors Control Register
AArch64 PMU registers
AArch64 PMU register summary
PMCEID0_EL0, Performance Monitors Common Event Identification Register 0, EL0
PMCEID1_EL0, Performance Monitors Common Event Identification Register 1, EL0
PMCR_EL0, Performance Monitors Control Register, EL0
Memory-mapped PMU registers
Memory-mapped PMU register summary
PMCFGR, Performance Monitors Configuration Register
PMCIDR0, Performance Monitors Component Identification Register 0
PMCIDR1, Performance Monitors Component Identification Register 1
PMCIDR2, Performance Monitors Component Identification Register 2
PMCIDR3, Performance Monitors Component Identification Register 3
PMPIDR0, Performance Monitors Peripheral Identification Register 0
PMPIDR1, Performance Monitors Peripheral Identification Register 1
PMPIDR2, Performance Monitors Peripheral Identification Register 2
PMPIDR3, Performance Monitors Peripheral Identification Register 3
PMPIDR4, Performance Monitors Peripheral Identification Register 4
PMPIDRn, Performance Monitors Peripheral Identification Register 5-7
PMU snapshot registers
PMU snapshot register summary
PMPCSSR, Snapshot Program Counter Sample Register
PMCIDSSR, Snapshot CONTEXTIDR_EL1 Sample Register
PMCID2SSR, Snapshot CONTEXTIDR_EL2 Sample Register
PMSSSR, PMU Snapshot Status Register
PMOVSSR, PMU Overflow Status Snapshot Register
PMCCNTSR, PMU Cycle Counter Snapshot Register
PMEVCNTSRn, PMU Cycle Counter Snapshot Registers 0-5
PMSSCR, PMU Snapshot Capture Register
AArch64 AMU registers
AArch64 AMU register summary
AMCNTENCLR0_EL0, Activity Monitors Count Enable Clear Register, EL0
AMCNTENSET_EL0, Activity Monitors Count Enable Set Register, EL0
AMCFGR_EL0, Activity Monitors Configuration Register, EL0
AMUSERENR_EL0, Activity Monitor EL0 Enable access, EL0
AMEVCNTRn_EL0, Activity Monitor Event Counter Register, EL0
AMEVTYPERn_EL0, Activity Monitor Event Type Register, EL0
ETM registers
ETM register summary
TRCACATRn, Address Comparator Access Type Registers 0-7
TRCACVRn, Address Comparator Value Registers 0-7
TRCAUTHSTATUS, Authentication Status Register
TRCAUXCTLR, Auxiliary Control Register
TRCBBCTLR, Branch Broadcast Control Register
TRCCCCTLR, Cycle Count Control Register
TRCCIDCCTLR0, Context ID Comparator Control Register 0
TRCCIDCVR0, Context ID Comparator Value Register 0
TRCCIDR0, ETM Component Identification Register 0
TRCCIDR1, ETM Component Identification Register 1
TRCCIDR2, ETM Component Identification Register 2
TRCCIDR3, ETM Component Identification Register 3
TRCCLAIMCLR, Claim Tag Clear Register
TRCCLAIMSET, Claim Tag Set Register
TRCCNTCTLR0, Counter Control Register 0
TRCCNTCTLR1, Counter Control Register 1
TRCCNTRLDVRn, Counter Reload Value Registers 0-1
TRCCNTVRn, Counter Value Registers 0-1
TRCCONFIGR, Trace Configuration Register
TRCDEVAFF0, Device Affinity Register 0
TRCDEVAFF1, Device Affinity Register 1
TRCDEVARCH, Device Architecture Register
TRCDEVID, Device ID Register
TRCDEVTYPE, Device Type Register
TRCEVENTCTL0R, Event Control 0 Register
TRCEVENTCTL1R, Event Control 1 Register
TRCEXTINSELR, External Input Select Register
TRCIDR0, ID Register 0
TRCIDR1, ID Register 1
TRCIDR2, ID Register 2
TRCIDR3, ID Register 3
TRCIDR4, ID Register 4
TRCIDR5, ID Register 5
TRCIDR8, ID Register 8
TRCIDR9, ID Register 9
TRCIDR10, ID Register 10
TRCIDR11, ID Register 11
TRCIDR12, ID Register 12
TRCIDR13, ID Register 13
TRCIMSPEC0, Implementation Specific Register 0
TRCITATBIDR, Integration ATB Identification Register
TRCITCTRL, Integration Mode Control Register
TRCITIATBINR, Integration Instruction ATB In Register
TRCITIATBOUTR, Integration Instruction ATB Out Register
TRCITIDATAR, Integration Instruction ATB Data Register
TRCLAR, Software Lock Access Register
TRCLSR, Software Lock Status Register
TRCCNTVRn, Counter Value Registers 0-1
TRCOSLAR, OS Lock Access Register
TRCOSLSR, OS Lock Status Register
TRCPDCR, Power Down Control Register
TRCPDSR, Power Down Status Register
TRCPIDR0, ETM Peripheral Identification Register 0
TRCPIDR1, ETM Peripheral Identification Register 1
TRCPIDR2, ETM Peripheral Identification Register 2
TRCPIDR3, ETM Peripheral Identification Register 3
TRCPIDR4, ETM Peripheral Identification Register 4
TRCPIDRn, ETM Peripheral Identification Registers 5-7
TRCPRGCTLR, Programming Control Register
TRCRSCTLRn, Resource Selection Control Registers 2-16
TRCSEQEVRn, Sequencer State Transition Control Registers 0-2
TRCSEQRSTEVR, Sequencer Reset Control Register
TRCSEQSTR, Sequencer State Register
TRCSSCCR0, Single-Shot Comparator Control Register 0
TRCSSCSR0, Single-Shot Comparator Status Register 0
TRCSTALLCTLR, Stall Control Register
TRCSTATR, Status Register
TRCSYNCPR, Synchronization Period Register
TRCTRACEIDR, Trace ID Register
TRCTSCTLR, Global Timestamp Control Register
TRCVICTLR, ViewInst Main Control Register
TRCVIIECTLR, ViewInst Include-Exclude Control Register
TRCVISSCTLR, ViewInst Start-Stop Control Register
TRCVMIDCVR0, VMID Comparator Value Register 0
TRCVMIDCCTLR0, Virtual context identifier Comparator Control Register 0
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