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Debug and trace interface

The Arm debug and trace interface enables powerful software debug and optimization on an Arm processor-based target system. It is based on the IEEE 1149.1 (JTAG) interface coupled with various additional signals. This chapter introduces these signals and describes their use within the interface.

Note

  • Unless otherwise specified, all pull-up/pull-down resistors that are discussed in this chapter must be between 1K and 100K (10K is recommended).

  • Unless otherwise specified, any signals beginning with a lowercase 'n' are, by default, active-LOW.

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