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ARM DS-5 Debugger User Guide : Cross-trigger configuration

Cross-trigger configuration

In a multiprocessor system, when debug events from one processor are used to affect the debug sessions of other processors, it is called cross-triggering. It is sometimes useful to control all processors with a single debugger command. For example, stopping all cores when a single core hits a breakpoint.

  • Hardware cross-triggering

    A hardware cross-triggering mechanism uses the cross-trigger network (composed of Cross Trigger Interface (CTI) and Cross Trigger Matrix (CTM) devices) present in a multiprocessor system. The advantage of using a hardware-based cross-triggering mechanism is low latency performance.

  • Software cross-triggering

    In a software cross-triggering scenario, the mechanism is performed and managed by the debugger. Using a software cross-triggering mechanism results in increased latency.

In DS-5, the Platform Configuration Editor (PCE) generates support for CTI-synchronized SMP and big.LITTLE™ debug operations platforms provided that sufficient and appropriate cores, and CTI are available in the SoC. PCE also supports for transporting trace trigger notifications across the cross-trigger network between trace sources and trace sinks.

CTI interfaces need to be programmed using the Debug and Trace Services Layer (DTSL) capabilities in DS-5. See the DTSL documentation or contact your support representative for more information.