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AndGate component

This section describes the AndGate component.

AndGate - about

This component implements a logical AND of two Signal input ports to generate a single output Signal. For example, you can use this component to combine two interrupt signals.

This is a LISA+ component.

AndGate - ports

This section describes the ports.

Table 4-25 AndGate ports

Name Protocol Type Description
input[0] Signal Slave First input signal
input[1] Signal Slave Second input signal
output Signal Master Combined output signal

AndGate - verification and testing

This component passes tests as part of the VE example system by using VE test suites and by booting operating systems.

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