You copied the Doc URL to your clipboard.

GIC500_Filter component

This section describes the GIC500_Filter component.

GIC500_Filter - about

This is a model of r0p0 of the GIC-500 Generic Interrupt Controller (GIC) for distribution of interrupts. It is a filtering version, for validation. This model is written in C++.

GIC500_Filter contains the following CADI targets:

  • GIC500

GIC500_Filter contains the following MTI components:

This is a single-component implementation of the GICv3 architecture with support for 256 cores. You can configure the model to support a maximum of 32 clusters with eight cores per cluster. Use it with an ARMv8-A core to deliver interrupts. It supports a single Interrupt Translation Service for message-based interrupts. It supports the architectural features, but does not support the implementation defined features.

GIC500_Filter - ports

This table describes the GIC500_Filter ports.

Table 4-86 GIC500_Filter ports

Name Protocol Type Description
cfgsdisable Signal Slave Disable some SPI signals.
cpu_active_n[8] Signal Slave cpu_active pins of cluster n. 0 <= n <= 31.
po_reset Signal Slave Power-on reset.
ppix_in_n[8] Signal Slave Private peripheral interrupts of cluster n. 0 <= n <= 31. 16 <= x <= 31.
pvbus_filtermiss_m PVBus Master Passthrough for transactions not targeting one of the pages associated with the IRI.
pvbus_m PVBus Master Memory bus out: transactions generated by the IRI.
pvbus_s PVBus Slave Memory bus in: this interface accepts memory-mapped register accesses.
redistributor_m[256] GICv3Comms Master Input from and output to the core interface.
reset Signal Slave Reset.
spi_in[988] Signal Slave Shared peripheral interrupts.
wake_request_n[8] Signal Master Power management outputs of cluster n. 0 <= n <= 31.

GIC500_Filter - parameters

This table describes the GIC500_Filter parameters.

Table 4-87 GIC500_Filter parameters

Name Type Allowed values Default value Description
cpus_per_cluster_n int 1-8 1 Number of cores in cluster n. 0 <= n <=31.
has-two-security-states bool true, false true If true, has two security states.
ITS-count int 0-1 1 Number of ITS components.
ITS-device-bits int 3-20 16 Number of bits supported for ITS device IDs.
num_clusters int 1-32 1 Number of clusters.
PA_SIZE int 32-48 48 Number of valid bits in physical address.
reg-base uint64_t - 0x2c010000 GIC500 base address.
SPI-count int 0-960 224 Number of implemented SPIs.
Was this page helpful? Yes No