You copied the Doc URL to your clipboard.

MemoryMappedGenericWatchdog component

This section describes the MemoryMappedGenericWatchdog component.

MemoryMappedGenericWatchdog - about

ARM Generic Watchdog. This model is written in LISA+. It is a high-level watchdog which generates two interrupts rather than an interrupt then a reset.

MemoryMappedGenericWatchdog contains the following CADI targets:

  • MemoryMappedGenericWatchdog

MemoryMappedGenericWatchdog contains the following MTI components:

MemoryMappedGenericWatchdog - ports

This section describes the ports.

Table 4-116 MemoryMappedGenericWatchdog - ports

Name Protocol Type Description
cntvalueb CounterInterface Slave -
ctl_pvbus_s PVBus Slave -
ref_pvbus_s PVBus Slave -
WS0 Signal Master -
WS1 Signal Master -

MemoryMappedGenericWatchdog - parameters

This section describes the parameters.

Table 4-117 MemoryMappedGenericWatchdog parameters

Name Type Allowed values Default value Description
diagnostics uint32_t 0x0-0x4 0x0 Diagnostics
NONSECURE bool true, false false Non-Secure
product_id uint8_t - 0x0 Product identifier
Previous Next
Was this page helpful? Yes No