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SP804_Timer component

This section describes the SP804_Timer component.

SP804_Timer - about

This LISA+ component is a model of the ARM® Dual-Timer Module (SP804).

SP804_Timer contains the following CADI targets:

  • CounterModule
  • SP804_Timer

SP804_Timer contains the following MTI components:

SP804_Timer - ports

This section describes the ports.

Table 4-194 SP804_Timer ports

Name Protocol Type Description
pvbus PVBus Slave Slave port for connection to PV bus master/decoder
irq_out0 Signal Master Interrupt signaling
irq_out1 Signal Master Interrupt signaling
clock ClockSignal Slave Clock input, typically 1MHz, driving master count rate
timer_en[0] ClockRateControl Slave Port for changing the rate of timer 1
timer_en[1] ClockRateControl Slave Port for changing the rate of timer 2

SP804_Timer - registers

This section describes the registers.

Table 4-195 SP804_Timer registers

Name Offset Access Description
Timer1Load 0x000 Read/write Data register
Timer1Value 0x004 Read only Value register
Timer1Control 0x008 Read/write Load register
Timer1IntClr 0x00C Write only Interrupt clear register
Timer1RIS 0x010 Read only Raw interrupt status register
Timer1MIS 0x014 Read only Masked interrupt status register
Timer1BGLoad 0x018 Read/write Background load register
Timer2Load 0x020 Read/write Data register
Timer2Value 0x024 Read only Value register
Timer2Control 0x028 Read/write Load register
Timer2IntClr 0x02C Write only Interrupt clear register
Timer2RIS 0x030 Read only Raw interrupt status register
Timer2MIS 0x034 Read only Masked interrupt status register
Timer2BGLoad 0x038 Read/write Background load register

SP804_Timer - verification and testing

This component passes tests as part of the SMLT component.

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