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Instruction generation

Instruction generation, arranged by instruction

The following table indicates how instructions may be generated by intrinsics, and/or C code. The table includes integer data processing and certain system instructions.

Compilers are encouraged to use opportunities to combine instructions, or to use shifted/rotated operands where available. In general, intrinsics are not provided for accumulating variants of instructions in cases where the accumulation is a simple addition (or subtraction) following the instruction.

The table indicates which architectures the instruction is supported on, as follows:

Architecture 8 means Armv8-A AArch32 and AArch64, 8-32 means Armv8-AArch32 only. 8-64 means Armv8-AArch64 only.

Architecture 7 means Armv7-A and Armv7-R.

In the sequence of Arm architectures { 5, 5TE, 6, 6T2, 7 } each architecture includes its predecessor instruction set.

In the sequence of Thumb-only architectures { 6-M, 7-M, 7E-M } each architecture includes its predecessor instruction set.

7MP are the Armv7 architectures that implement the Multiprocessing Extensions.

Instruction Flags Arch. Intrinsic or C code
BKPT   5 none
BFC   6T2, 7-M C
BFI   6T2, 7-M C
CLZ   5 __clz, __builtin_clz
DBG   7, 7-M __dbg
DMB   8,7, 6-M __dmb
DSB   8, 7, 6-M __dsb
FRINT32Z   8-64 __rint32zf, __rint32z
FRINT64Z   8-64 __rint64zf, __rint64z
FRINT32X   8-64 __rint32xf, __rint32x
FRINT64X   8-64 __rint64xf, __rint64x
ISB   8, 7, 6-M __isb
LDREX   6, 7-M __sync_xxx
LDRT   all none
MCR/MRC   all see System register access
MSR/MRS   6-M see System register access
PLD   8-32,5TE, 7-M __pld
PLDW   7-MP __pldx
PLI   8-32,7 __pli
QADD Q 5E, 7E-M __qadd
QADD16   6, 7E-M __qadd16
QADD8   6, 7E-M __qadd8
QASX   6, 7E-M __qasx
QDADD Q 5E, 7E-M __qadd(__qdbl)
QDSUB Q 5E, 7E-M __qsub(__qdbl)
QSAX   6, 7E-M __qsax
QSUB Q 5E, 7E-M __qsub
QSUB16   6, 7E-M __qsub16
QSUB8   6, 7E-M __qsub8
RBIT   8,6T2, 7-M __rbit, __builtin_rbit
REV   8,6, 6-M __rev, __builtin_bswap32
REV16   8,6, 6-M __rev16
REVSH   6, 6-M __revsh
ROR   all __ror
SADD16 GE 6, 7E-M __sadd16
SADD8 GE 6, 7E-M __sadd8
SASX GE 6, 7E-M __sasx
SBFX   8,6T2, 7-M C
SDIV   7-M+ C
SEL (GE) 6, 7E-M __sel
SETEND   6 n/a
SEV   8,6K,6-M,7-M __sev
SHADD16   6, 7E-M __shadd16
SHADD8   6, 7E-M __shadd8
SHASX   6, 7E-M __shasx
SHSAX   6, 7E-M __shsax
SHSUB16   6, 7E-M __shsub16
SHSUB8   6, 7E-M __shsub8
SMC   8,6Z, T2 none
SMI   6Z, T2 none
SMLABB Q 5E, 7E-M __smlabb
SMLABT Q 5E, 7E-M __smlabt
SMLAD Q 6, 7E-M __smlad
SMLADX Q 6, 7E-M __smladx
SMLAL   all, 7-M C
SMLALBB   5E, 7E-M __smulbb and C
SMLALBT   5E, 7E-M __smulbt and C
SMLALTB   5E, 7E-M __smultb and C
SMLALTT   5E, 7E-M __smultt and C
SMLALD   6, 7E-M __smlald
SMLALDX   6, 7E-M __smlaldx
SMLATB Q 5E, 7E-M __smlatb
SMLATT Q 5E, 7E-M __smlatt
SMLAWB Q 5E, 7E-M __smlawb
SMLAWT Q 5E, 7E-M __smlawt
SMLSD Q 6, 7E-M __smlsd
SMLSDX Q 6, 7E-M __smlsdx
SMLSLD   6, 7E-M __smlsld
SMLSLDX   6, 7E-M __smlsldx
SMMLA   6, 7E-M C
SMMLAR   6, 7E-M C
SMMLS   6, 7E-M C
SMMLSR   6, 7E-M C
SMMUL   6, 7E-M C
SMMULR   6, 7E-M C
SMUAD Q 6, 7E-M __smuad
SMUADX Q 6, 7E-M __smuadx
SMULBB   5E, 7E-M __smulbb; C
SMULBT   5E, 7E-M __smulbt ; C
SMULTB   5E, 7E-M __smultb; C
SMULTT   5E, 7E-M __smultt; C
SMULL   all, 7-M C
SMULWB   5E, 7E-M __smulwb; C
SMULWT   5E, 7E-M __smulwt; C
SMUSD   6, 7E-M __smusd
SMUSDX   6, 7E-M __smusd
SSAT Q 6, 7-M __ssat
SSAT16 Q 6, 7E-M __ssat16
SSAX GE 6, 7E-M __ssax
SSUB16 GE 6, 7E-M __ssub16
SSUB8 GE 6, 7E-M __ssub8
STREX   6, 7-M __sync_xxx
STRT   all none
SVC   all none
SWP   A32 only __swp [deprecated; see Swap]
SXTAB   6, 7E-M (int8_t)x + a
SXTAB16   6, 7E-M __sxtab16
SXTAH   6, 7E-M (int16_t)x + a
SXTB   8,6, 6-M (int8_t)x
SXTB16   6, 7E-M __sxtb16
SXTH   8,6, 6-M (int16_t)x
UADD16 GE 6, 7E-M __uadd16
UADD8 GE 6, 7E-M __uadd8
UASX GE 6, 7E-M __uasx
UBFX   8,6T2, 7-M C
UDIV   7-M+ C
UHADD16   6, 7E-M __uhadd16
UHADD8   6, 7E-M __uhadd8
UHASX   6, 7E-M __uhasx
UHSAX   6, 7E-M __uhsax
UHSUB16   6, 7E-M __uhsub16
UHSUB8   6, 7E-M __uhsub8
UMAAL   6, 7E-M C
UMLAL   all, 7-M acc += (uint64_t)x * y
UMULL   all, 7-M C
UQADD16   6, 7E-M __uqadd16
UQADD8   6, 7E-M __uqadd8
UQASX   6, 7E-M __uqasx
UQSAX   6, 7E-M __uqsax
UQSUB16   6, 7E-M __uqsub16
UQSUB8   6, 7E-M __uqsub8
USAD8   6, 7E-M __usad8
USADA8   6, 7E-M __usad8 + acc
USAT Q 6, 7-M __usat
USAT16 Q 6, 7E-M __usat16
USAX   6, 7E-M __usax
USUB16   6, 7E-M __usub16
USUB8   6, 7E-M __usub8
UXTAB   6, 7E-M (uint8_t)x + i
UXTAB16   6, 7E-M __uxtab16
UXTAH   6, 7E-M (uint16_t)x + i
UXTB16   6, 7E-M __uxtb16
UXTH   8,6, 6-M (uint16_t)x
VFMA   VFPv4 fma, __fma
VSQRT   VFP sqrt, __sqrt
WFE   8,6K, 6-M __wfe
WFI   8,6K, 6-M __wfi
YIELD   8,6K, 6-M __yield
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