TRCDEVARCH, Device Architecture Register
The TRCDEVARCH identifies the ETM trace unit as an ETMv4 component.
Bit field descriptions
The TRCDEVARCH is a 32-bit register.
Figure D10-20 TRCDEVARCH bit assignments
- ARCHITECT, [31:21]
Defines the architect of the component:
Arm JEP continuation.
Arm JEP 106 code.
- PRESENT, 
Indicates the presence of this register:
Register is present.
- REVISION, [19:16]
Architecture revision 2.
- ARCHID, [15:0]
Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.
The TRCDEVARCH can be accessed through the external debug interface, offset