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TRCITATBCTR2, Trace Integration Test ATB Control Register 2

TRCITATBCTR2 enables the values of signal inputs to be read when bit[0] of the Integration Mode Control Register is set.

Bit field descriptions

The TRCITATBCTR2 is a 32-bit register.

Figure D10-41 TRCITATBCTR2 bit assignments


AFVALIDM, [1]
Returns the value of AFVALIDM input.
ATREADYM, [0]
Returns the value of ATREADYM input. To sample ATREADYM correctly from the processor signals, ATVALIDM must be asserted.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.

The TRCITATBCTR2 register can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xEF0.