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TRCITATBDATA0, Trace Integration Test ATB Data Register 0

TRCITATBDATA0 controls signal outputs when TRCITCTRL.IME is set.

Bit field descriptions

The TRCITATBDATA0 is a 32-bit register.

Figure D10-42 TRCITATBDATA0 bit assignments


ATDATAM[31], [4]Drives the ATDATAM[31] output.
ATDATAM[23], [3]Drives the ATDATAM[23] output.
ATDATAM[15], [2]Drives the ATDATAM[15] output.
ATDATAM[7], [1]Drives the ATDATAM[7] output.
ATDATAM[0], [0]Drives the ATDATAM[0] output.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.

The TRCITATBDATA0 register can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xEEC.