You copied the Doc URL to your clipboard.

TRCITMISCIN, Trace Integration Miscellaneous Input Register

TRCITMISCIN enables the values of signal inputs to be read when TRCITCTRL.IME is set.

Bit field descriptions

The TRCITMISCIN is a 32-bit register.

Figure D10-44 TRCITMISCIN bit assignments

ETMEXTIN[3:0], [3:0]
Returns the value of the ETMEXTIN[3:0] inputs.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.

The TRCITMISCIN register can be accessed through the internal memory-mapped interface and the external debug interface, offset 0xEE0.