TRCSTATR, Status Register
The TRCSTATR indicates the ETM trace unit status.
Bit field descriptions
The TRCSTATR is a 32-bit register.
Figure D10-65 TRCSTATR bit assignments
- RES0, [31:2]
- PMSTABLE, 
Indicates whether the ETM trace unit registers are stable and can be read:
The programmers model is not stable.
The programmers model is stable.
- IDLE, 
The ETM trace unit is not idle.
The ETM trace unit is idle.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.
The TRCSTATR can be accessed through the external debug interface, offset