TRCSYNCPR, Synchronization Period Register
The TRCSYNCPR controls how often periodic trace synchronization requests occur.
Bit field descriptions
The TRCSYNCPR is a 32-bit register.
Figure D10-66 TRCSYNCPR bit assignments
- RES0, [31:5]
- PERIOD, [4:0]
Defines the number of bytes of trace between synchronization requests as a total of the number of bytes generated by both the instruction and data streams. The number of bytes is 2N where N is the value of this field:
- A value of zero disables these periodic synchronization requests, but does not disable other synchronization requests.
- The minimum value that can be programmed, other than zero, is 8, providing a minimum synchronization period of 256 bytes.
- The maximum value is 20, providing a maximum synchronization period of 220 bytes.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.
The TRCSYNCPR can be accessed through the external debug interface, offset