TRCTSCTLR, Global Timestamp Control Register
The TRCTSCTLR controls the insertion of global timestamps in the trace streams. When the selected event is triggered, the trace unit inserts a global timestamp into the trace streams. The event is selected from one of the Resource Selectors.
Bit field descriptions
The TRCTSCTLR is a 32-bit register.
Figure D10-68 TRCTSCTLR bit assignments
- RES0, [31:8]
- TYPE, 
- Single or combined resource selector.
- RES0, [6:4]
- SEL, [3:1]
- Identifies the resource selector to use.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.
The TRCTSCTLR can be accessed through the external debug interface, offset