Debug over powerdown
The Cortex®‑A77 core supports debug over powerdown, which allows a debugger to retain its connection with the core even when powered down. This enables debug to continue through powerdown scenarios, rather than having to re-establish a connection each time the core is powered up.
The debug over powerdown logic is part of the DebugBlock, which is external to the cluster and can be implemented in a separate power domain. If the DebugBlock is in the same power domain as the core, then debug over powerdown is not supported.
For more information on the DebugBlock, see the Arm® DynamIQ™ Shared Unit Technical Reference Manual.