Flash download requirements
The DAPLink processor on the V2C-DAPLink is pre-programmed with a flash download routine. This is used for drag-and-drop programming and debugger code download. To maintain compatibility with the pre-programmed image, you must retain the following components in your system.
Table 5-1 Interface type
|Base address||Interface path in example design||Description|
||Daplink_if_0/axi_xip_quad_spi_0/AXI_FULL||Code execution from dedicated Quad Serial Port Interface (QSPI) on V2C-DAPLink memory interface.|
||Daplink_if_0/axi_xip_quad_spi_0/AXI_LITE||Configuration interface that is used to set QSPI clock polarity and clock phase for eXecute-In-Place (XIP) execution.|
||daplink_if_0/axi_quad_spi_0||Normal mode QSPI controller used to read, write, and verify code to the dedicated QSPI on the V2C-DAPLink memory interface.|
||Daplink_if_0/axi_gpio_0||Bit  is used to control muxing of the QSPI interface.
NoteThere is another peripheral, axi_single_spi_0 on the V2C-DAPLink board. This is a normal mode SPI controller that is used to write to the V2C-DAPLink SD card slot. In the example design, this has a base address of
0x40030000. The address of this peripheral is not fixed, however, Arm recommends that you do not change the address unless required.