Sorry, your browser is not supported. We recommend upgrading your browser.
We have done our best to make all the documentation and resources available on old versions of Internet Explorer, but vector image support and the layout may not be optimal. Technical documentation is available as a PDF Download.
Arm Cortex-M3 DesignStart FPGA-Xilinx edition User Guide Revision r0p0
You copied the Doc URL to your clipboard.
Arm Cortex-M3 DesignStart FPGA-Xilinx edition User Guide : Executing code from QSPI
Executing code from QSPI
The Quad Serial Port Interface (QSPI) on the V2C-DAPLink is configured as an eXecute-In-Place (XIP) controller. Within the testbench, the V2C-DAPLink QSPI device model, S25fl128S, is preloaded with code from the qspi-a7.hex file. If `INCLUDE_DAPLINK is defined, and `DAPLINK_LINK_NF is not defined, then code is executed from the QSPI model.
Code execution from the QSPI model is approximately ten times slower than the execution from the Instruction Tightly Coupled Memory (ITCM) RAM. This is because of the access of the QSPI and the subsequent data transfer through the AXI interconnect.