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ARMv7-M Special Registers that are accessible by MSR/MRS instructions

Article ID: 103487985

Published date: 31 Jan 2018

Last updated: -

Applies to: Cortex-M

Question

Which ARMv7-M Special Registers may be accessed by MSR/MRS instructions?

Answer

APSR

can always be read or written

EPSR

always reads as zero, no write

IPSR

privileged read, no write

Combined 'PSR's act as the sum of the parts. For example, IEPSR would allow privileged read of the IPSR bits but the EPSR bits would return zeros.

MSP

privileged read and write

PSP

privileged read and write

PRIMASK

privileged read and write

BASEPRI

privileged read and write

BASEPRI_MAX

privileged read and write

FAULTMASK

privileged read and write

CONTROL

always readable, privileged write

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