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Why does BST language not work well in Serial Wire mode?

Information in this article applies to:

  • Cortex-M3

Problem/Question

Why does BST language not work well in Serial Wire mode?

Scenario

This knowledge article is relevant to chip designers who have licensed the Cortex-M3 processor for use in their chip designs.

The processor design is delivered as an RTL description, together with an example design and testbench. The example design can be used to simulate the processor behavior, and the testbench can run several test programs in simulation.

The testbench includes the capability to simulate debug operations. This simulation can be done through a Serial Wire/JTAG Interface Manager (SWJIM) component that is connected to the debug slave interface of the processor. Debug operations are expressed in low-level BST commands and higher-level DAP Macro Language (DAPML) commands. Documentation on these instruction formats is provided in the ./example/coresight/doc/. directory in the Cortex-M3 release.

The example programs that are stored under the ./example/Software/. directory can be run from the run_example script, as described in the README file. Both of these files are in directory ./example/. The test programs are either simple C programs ( <testname>.c ) that are executed on the processor, or combined C and DAPML programs, ( <testname>.cdapml ). If using the combined programs, the C code is executed at the same time that the DAPML debug sequence is applied to the debug interface of the processor.

By default, the SWJIM component generates the debug sequences using the JTAG protocol on the debug interface connection. The protocol can be switched to the Arm 2-pin Serial Wire Debug (SWD) protocol by including a DAPML switching sequence in the program. For example:

  PRINTF "Switch to SWD mode"
DAP_DP_SWITCHMODE
PRINTF "Checking SW-DP IDCODE"
DAP_READ_DPACC DPIDCODE 2BA01477

The JTAG and SWD portions of the debug sequence are processed separately. The SWD portion is handled by a script called SWIMconvert.pl. The script is executed in simulation by a module that is called SWDriver.v instantiated within the SWJIM.

Several of the BST commands that are documented in the BSTUserGuide.pdf are not implemented in the Serial Wire processing script and driver module. In addition, some of the BST commands exhibit differences in syntax and behavior compared to what is documented in the PDF.

Answer

Some instructions are not supported at all, for example the LOOPZ and WAIT instructions.

  ../shared/logical/bin/SWIMconvert.pl bin/test_dapml_SWIM.bsi bin/test_dapml_SWIM.hex
Unrecognised line : line 130
WAIT 8

../shared/logical/bin/SWIMconvert.pl bin/test_dapml_SWIM.bsi bin/test_dapml_SWIM.hex
Unrecognised line : line 130
LOOPZ 5 B2

However, code loops can still be implemented by using arithmetic operations and conditional branches. Delays might be included by performing redundant operations, such as a register read with all bit positions masked.

The PRINT instruction is documented as:

PRINT <var> : writes out the current value of <var> to the console and log.bst_tube

The version of SWDriver.v that is provided with Cortex-M3 versions up to and including r2p1-00rel0 does not print to either of these locations. Instead, SWDriver.v prints to the file log.swim instead.

You can add printing to the console (simulation transcript) by replacing the original SWDriver.v with the patched version attached here, in the directory ./example/coresight/logical/SWJIM/.

The arithmetic and logical operations ADD / SUB / AND / ORR / EOR are implemented in Cortex-M3 versions up to and including r2p1-00rel0 in the SWIMconvert.pl script. These operations are implemented as the following 3-operand instructions:

<operator> <destination reg> <source reg> <operand register | #hex constant>

However, these operations are documented (and implemented in JTAG mode) as 2-operand instructions. In this case, the first operand is both the source and the destination register.

Support for the correct 2-operand syntax can be added by replacing SWIMconvert.pl with the patched version attached here , in the directory ./example/coresight/shared/logical/bin/.

Note: If you execute the 3-operand form in JTAG mode, there might not be any error in compilation. However, you might get an unexpected execution where the following happens:

  • The first argument is taken as both the destination and source registers.

  • The second argument is taken as the other operand.

  • The third operand is ignored.

Making these adjustments (using the updated files attached), a simple looping program that works correctly in JTAG protocol also works correctly in SW protocol mode. For example, the test_bst.cdapml program that is attached results in a simulation transcript that is similar to the following (Mentor QuestaSim) run:

# do simulator.cmds
# TUBE: SWDriver ARM support patch gc.1.0.0 - PRINT <var> to console as well as to log.swim
# TUBE: SWIM End of pre-loaded code at 00000109
# TUBE: SWJIM End of pre-loaded code at 00000006
...
#
# TUBE: "Checking SW-DP IDCODE"
# TUBE: Variable # 5 ; Value = 0000003c
# TUBE: Variable # 4 ; Value = 0000000f
# TUBE: " "
# TUBE: "Entering loop on variable 5..."
# TUBE: " looping on 5..."
# TUBE: " sub 5 4"
# TUBE: Variable # 5 ; Value = 0000002d
# TUBE: " looping on 5..."
# TUBE: " sub 5 4"
# TUBE: Variable # 5 ; Value = 0000001e
# TUBE: " looping on 5..."
# TUBE: " sub 5 4"
# TUBE: Variable # 5 ; Value = 0000000f
# TUBE: " looping on 5..."
# TUBE: " sub 5 4"
# TUBE: Variable # 5 ; Value = 00000000
# TUBE: "Exited loop 1"
# TUBE: " "
# TUBE: "Entering loop on variable 4..."
# TUBE: " looping on 4 ..."
# TUBE: " sub 4 #5"
# TUBE: Variable # 4 ; Value = 0000000a
# TUBE: " looping on 4 ..."
# TUBE: " sub 4 #5"
# TUBE: Variable # 4 ; Value = 00000005
# TUBE: " looping on 4 ..."
# TUBE: " sub 4 #5"
# TUBE: Variable # 4 ; Value = 00000000
# TUBE: "Exited loop 2"
# TUBE: " "
# TUBE: "** TEST PASSED OK **"
# TUBE: Found end of SingleWire command file, ending simulation
# TUBE: Test Finished

Workaround

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Example

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Related Information

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