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How can I ensure that WFE causes sleep?

Article ID: 103489611

Published date: 13 Feb 2018

Last updated: -

Applies to: Cortex-M3, Cortex-M4


How can I ensure that WFE causes sleep?


The WFE instruction is architecturally defined to be a NOP hint instruction. Its intended usage is as part of a power saving strategy in spinlock loops.

It is possible that execution of a WFE instruction will complete immediately without causing the processor to go into a low power (sleeping) state. Indeed, it is likely that when the processor first encounters a WFE instruction after a period of execution without encountering a WFE instruction, the WFE condition will be immediately satisfied and sleep will not take place.

Typically, sleep will take place when the processor loops around and re-executes the WFE instruction. The processor may wake up for spurious reasons from this spinlock sleep before the spinlock condition is eventually satisfied. Placing the WFE in the loop allows the processor to return to the sleeping condition repeatedly until the condition is met.

From the ARM v7-M Architecture Reference Manual:


WFE wakeup events

The following events are WFE wakeup events:

  • the execution of an SEV instruction on any processor in the multiprocessor system

  • any exception entering the Pending state if SEVONPEND in the System Control Register is set

  • an asynchronous exception at a priority that preempts any currently active exceptions

  • a debug event with debug enabled

  • event from another processor/peripheral via RXEV.

The Event Register

The Event Register is a single-bit register for each processor in a multiprocessor system. When set, an Event Register indicates that an event has occurred, since the register was last cleared, that might prevent the processor needing to suspend operation on issuing a WFE instruction. The following conditions apply to the Event Register:

  • A reset clears the Event Register.

  • Any WFE wakeup event, or the execution of an exception return instruction, sets the Event Register.

For the definition of exception return instructions see Exception return behavior on page B1-652.

  • A WFE instruction clears the Event Register.

  • Software cannot read or write the value of the Event Register directly.


There is nothing to cause the event register to become set unexpectedly if all the following conditions are true:

  • You are not executing any instructions which can cause exceptions (for example LDR/STR, SVC)

  • You do not have any asynchronous sources of exceptions active (NMI, INTISR, SysTick)

  • You do not have a debugger attached which could issue a debug HALT.

However, for testing or for other purposes, you may need to demonstrate a guaranteed period of sleep caused by WFE. If the processor does implement WFE sleep behavior, you can use the sequence:

  1. SEV

  2. WFE

  3. WFE

The SEV will set the event register, causing the first WFE to complete execution immediately. The second WFE will then be executed with the event register cleared. In the absence of any of the other possible mechanisms for setting the event register, this will put the processor to sleep until the RXEV input goes HIGH.

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