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Clarification of the PARTNO value in the IDCODE and DPIDR registers of the DAP Debug Port

Information in this article applies to:

  • CoreSight Debug and Trace
  • Cortex-A
  • Cortex-R
  • Cortex-M

Problem/Question

I am confused about the PARTNO value in the IDCODE of my CoreSight DAP's Debug Port

Scenario

The original Scenario for this Knowledge Base Article relates to a discrepancy in the ARM Debug Interface v5 Architecture Specification (ADIv5) revision 'A' This specification has since been superseded by a number of newer revisions of the specification. The Answer section here is updated to include the newer revisions. The original scenario was as follows:

--- original scenario ---

The ADIv5 revision 'A' indicates that:

[27:12] PARTNO Part Number for the DP. This value is provided by the designer of the Debug Port and must not be changed. Current DPs designed by ARM Limited have the following PARTNO values:

  • JTAG-DP 0xBA00

  • SW-DP 0xBA10

The CoreSight Components Technical Reference Manual (TRM) revision 'H' indicates that:

[27:12] PARTNO Part Number for the debug port. This value is provided by the designer of the Debug Port and must not be changed. Current ARM-designed debug ports have the following PARTNO values:

  • JTAG-DP 0xBA00

  • SW-DP 0xBA02

The SW-DP part numbers are inconsistent.

Answer

The discrepancy in the ADIv5 revision 'A' is addressed by the following Answer:

Read the supplementary document ADIv5.1 'ARM® Debug Interface v5 Architecture Specification ADIv5.1 Supplement' in conjunction with the ADIv5. This is document number DSA09-PRDC-008772.The ADIv5.1 document contains:

  • Errata for the ADIv5 document.

  • Extensions to the ADIv5 Architecture.

The code 0xBA10 for the SW-DP IDCODE PARTNO is a typographical error in the ADIv5, as noted in the errata section of ADIv5.1.

The ADIv5.1 introduces the concept of Multi-drop Serial Wire, where a single Serial Wire Debug (SWD) port can identify and control multiple SW-DPs over a single Serial Wire connection.

ADIv5.1 also changes the name of the SW-DP IDCODE register to "DPIDR".

The general explanation for newer revisions of ADI is as follows:

For JTAG-DPs, the PARTNO field remains IDCODE[27:12] as a single value specified by the designer of the DP and without attributing meaning to any separate bitfields within this range. Early JTAG-compatible DPs designed by Arm all used a PARTNO value of 0xBA00. More recent implementations have used incremental updates to this value. At the time of writing this update (February 2019 CE), values up to 0xBA07 are in use.

ADIv5.1 refines the definition of the bitfields within the range DPIDR[27:12].

The Arm Debug Interface Architecture Specification ADIv5.0 to ADIv5.2 (ADIv5.2) and the Arm Debug Interface Architecture Specification ADIv6.0 (ADIv6.0) maintain this new definition of DPIDR, and ADIv6.0 both introduces DP version 3, and makes it a requirement that the DAP uses DP version 3.

DPIDR[27:12] are divided into:

  • IDCODE[27:20] = PARTNO = 0xBA

  • IDCODE[19:17] = reserved '0'

  • IDCODE[16] = M (Minimal) = 0 for regular DPs, 1 for reduced functionality DPs

  • IDCODE[15:12] = VERSION

The VERSION field for the DPIDR takes one of the following values:

  • 0x1 : version 1 SW-DP, supporting a single SW-DP per SWD port.

  • 0x2 : version 2 SW-DP, supporting Muti-drop.

  • 0x3 : version 3 required by ADIv6.0

At the time of writing this update, Arm's SW-DP implementations use a variety of PARTNO values between 0xBA and 0xBF and a wide range of REVISION numbers in DPIDR[31:28].

Detailed descriptions of the different DP versions are included in ADIv6.0.

Workaround

N/A

Example

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