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Why do the ACE interface and the CHI interface have differences in the DVM acceptance capability?

Information in this article applies to:

  • DSU

Problem/Question

Why do the ACE interface and the CHI interface have differences in the DVM acceptance capability?

Scenario

The DynamIQTM Shared Unit (DSU) can be configured as an ACE master interface or a CHI master interface.

In the DSU Technical Reference Manual (TRM) document, there is a property DVM acceptance capability with the value 4 for the CHI channel. However, there is no DVM acceptance capability property for the ACE channel. Why is there this difference between the ACE interface and the CHI interface?

Answer

On the CHI interface, the DVM acceptance capability is important. If the interconnect sends more DVM snoop requests than the capability, the system might deadlock. The deadlock problem can be caused by the two parts of the SnpDVMOp messages. For example, if the first parts of four SnpDVMOp snoop requests are sent and then the fifth SnpDVMOp snoop request arrives, the fifth SnpDVMOp snoop request cannot be accepted. This might block the second half of the other messages from being received.

On the ACE interface, if the interconnect sends more DVM snoop requests than the cluster can accept, the cluster deasserts ACREADY until the cluster finishes processing earlier DVM snoop requests. Therefore, this does not cause a problem. The only restriction on the ACE interface is that the interconnect must not send more than 256 DVM syncs. The number 256 for DVM syncs is fixed in the ACE protocol.

Workaround

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Example

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Related Information

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