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1.7.6. LCD TFT (LcdTFT)

The LCD TFT (LcdTFT) bit selects whether the LCD controller operates in passive (STN) or active (TFT) display control mode. When LcdTFT=0 : passive or STN mode is selected; all LCD data flow operates normally (including the use of the LCD’s dither logic); and all LCD controller pin timing operates as described in 1.5.7 LCD controller Pins on page 1-21. When LcdTFT=1, active or TFT mode is selected. Video data is transferred via the DMA from off-chip memory to the input FIFO, is unpacked and used to select an entry from the palette (for 4 and 8 bits-per-pixel modes), just as for passive mode. See Figure 1.13.

Figure 1.13. Passive mode pixel clock and data pin timing

Figure 1.13. Passive mode pixel clock and data
pin timing

The value read from the palette, however, bypasses the LCD’s dither logic and is sent directly to the output FIFO to be output on the LCD’s data pins. In TFT mode, the pixel size within the frame buffer is increased to 16 bits when 12- or 16-bit pixel encoding mode is enabled (BPP=11). Thus two 16-bit values are packed into each word in the frame buffer. See Figure 1.14.

Figure 1.14. Active mode pixel clock and data pin timing

Figure 1.14. Active mode pixel clock and data
pin timing

The size of the pixel encoding is increased in TFT mode because the LCD’s dither logic is bypassed (which only supports 3-bit RGB dithering). Increasing the size of the pixel representation allows a total of 64K colors to be addressed using an off-chip palette that is used in conjunction with the LCD controller.