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1.22. LCD Controller Register Locations

Table 1.24 shows the registers associated with the LCD controller and the physical addresses used to access them.

LCD register map locations
0hC100 0000LcdControlLCD Control Register
0hC100 0004LcdStatusLCD Status Register
0hC100 0008-Reserved
0hC100 000C-Reserved
0hC100 0010DBAR1DMA Channel 1 Base Address Register
0hC100 0014DCAR1DMA Channel 1 Current Address Register
0hC100 0018DBAR2DMA Channel 2 Base Address Register
0hC100 001CDBAR2DMA Channel 2 Current Address Register
0hC100 0020LcdTiming0LCD Timing 0 Register
0hC100 0024LcdTiming1LCD Timing 1 Register
0hC100 0028LcdTiming2LCD Timing 2 Register
0hC100 0400GSTWGray Scaler Test mode Write Register
0hC100 0404GSTRDFAGray Scaler Test mode Read Frame Phase Accumulator Register
0hC100 0408GSTRDRAGray Scaler Test mode Read Row Phase Accumulator Register
0hC100 040CGSTRDCAGray Scaler Test mode Read Column Phase Accumulator Register
0hC100 0800–0hC100 0900UPPTRUpper Panel Palette Test Read Mapped Registers
0hC100 0C00–0hC100 0D00LPPTRLower Panel Palette Test Read Mapped Registers
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