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1.2. Processor functional block diagram

Figure 1.1 shows the functional block diagram of the ARM920T processor.

Figure 1.1. ARM920T functional block diagram

The blocks shown in Figure 1.1 are described as follows:

The ARM9TDMI core is described in the ARM9TDMI Technical Reference Manual.
Register 13 and coprocessor 15 are described in Chapter 2 Programmer’s Model.
The instruction and data MMUs are described in Chapter 3 Memory Management Unit.
The instruction and data caches, the write buffer, and the write-back PA TAG RAM are described in Chapter 4 Caches, Write Buffer, and Physical Address TAG (PA TAG) RAM.
The AMBA bus interface is described in Chapter 6 Bus Interface Unit.
The external coprocessor interface is described in Chapter 7 Coprocessor Interface.
The trace interface port is described in Chapter 8 Trace Interface Port.

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