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10.3. TrackingICE outputs

Table 10.1 shows the ARM920T outputs that are re-used when the ARM920T processor is in TrackingICE mode.

ARM920T in TrackingICE mode 

ARM920T

output

Attach to tracking ARM9TDMI

input

IR[3:2]CHSE[1:0]
IR[1:0]CHSD[1:0]
SCREG[4]nIRQ
SCREG[3]nFIQ
SCREG[2]DABORT
SCREG[1]IABORT
TAPSM[3]EXTERN1
TAPSM[2]EXTERN0
TAPSM[1]DEWPT
TAPSM[0]IEBKPT
ICAPCLKBSHIVECS
ECAPCLKBSEDBGGQ
PCLKBSnWAIT
RSTCLKBSnRESET
SHCLK1BSTDI
SHCLK2BSTMS
TCK1GCLK
TCK2TCK
SDINSDOUTBS

The remaining input connections to the ARM9TDMI core are:

  • ID bus attaches to the CPID bus

  • DD bus attaches to the CPDOUT bus

  • BIGEND input attaches to the BIGENDOUT.

These can still be attached to a coprocessor when the ARM920T processor is in tracking mode. The only difference in behavior is that CPDOUT mirrors the ARM920T DD bus on every cycle, not only for coprocessor data transfers. The following conditions apply:

  • The ISYNC and nTRST inputs must be common between the ARM920T and the tracking ARM9TDMI processor.

  • IABE and DABE of the tracking ARM9TDMI processor must be HIGH so that the address outputs can be observed.

  • DDBE of the tracking ARM9TDMI processor must be LOW to prevent a drive clash on the bidirectional DD bus. It is not necessary for the tracking ARM9TDMI to drive the DD bus because CPDOUT is driven with the data from all memory access cycles.

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