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B.1. Using the EtmMuxDemux block

The EtmMuxDemux module takes the standard trace port interface from the ETM9 and, using the CLK, PWRDOWN, ETMnRESET, PORTMODE, and CLKDIVTWOEN outputs, converts the trace to the correct port mode. The example HDL for configuring the trace port is not part of the ETM9 macrocell HDL. It is provided in an additional file ETM9/EtmMuxDemux.v in the ETM9 HDL directory.

Figure B.1. ETM to EtmMuxDemux connections

Figure B.1. ETM to EtmMuxDemux connections

Refer to Clocks and resets for more information on CLK and nRESET.


  • When instantiating your EtmMuxDemux module, ensure that you wire all 16 TRACEPKT signals to all 16 TRACEPKTetm[15:0] signals.

  • Ensure that the EtmMuxDemux CLK input is wired to the ETM CLK and not the core clock.

  • Ensure that EtmMuxDemux nRESET is wired to the ETM nRESET and not the core reset.