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3.3.9. Interrupt clear register, GPIOIC

The GPIOIC register is the interrupt clear register. Writing a 1 to a bit in this register clears the corresponding interrupt edge detection logic register. Writing a 0 has no effect. This register is write-only and all bits are cleared by a reset.

Table 3.10 shows the bit assignment of the GPIOIC register.

GPIOIC register 


Interrupt clear register


Bit written as 1, clears edge detection logic.

Bit written as 0, has no effect.

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