The PrimeCell GPIO registers are shown in Table 3.1.
Address | Type | Width | Reset value | Name | Description |
|---|---|---|---|---|---|
GPIO base +
GPIO
base + | Read/write | 8 |
| GPIODATA | PrimeCell GPIO data register |
GPIO base +
| Read/write | 8 |
| GPIODIR | PrimeCell GPIO data direction register |
GPIO base +
| Read/write | 8 | 0x00 | GPIOIS | PrimeCell GPIO interrupt sense register |
GPIO base +
| Read/write | 8 | 0x00 | GPIOIBE | PrimeCell GPIO interrupt both edges register |
GPIO base +
| Read/write | 8 | 0x00 | GPIOIEV | PrimeCell GPIO interrupt event register |
GPIO base +
| Read/write | 8 | 0x00 | GPIOIE | PrimeCell GPIO interrupt mask |
GPIO base +
| Read | 8 | 0x00 | GPIORIS | PrimeCell GPIO raw interrupt status |
GPIO base +
| Read | 8 | 0x00 | GPIOMIS | PrimeCell GPIO masked interrupt status |
GPIO base +
| Write | 8 | 0x00 | GPIOIC | PrimeCell GPIO interrupt clear |
GPIO base +
| Read/write | 8 | 0x00 | GPIOAFSEL | PrimeCell GPIO mode control select |
GPIO base +
| - | - | - | - | Reserved for future use and test purposes |
GPIO base +
| - | - | - | - | Reserved for future ID expansion |
GPIO base +
| Read | 8 |
| GPIOPeriphID0 | Peripheral identification register bits 7:0 |
GPIO base +
| Read | 8 |
| GPIOPeriphID1 | Peripheral identification register bits 15:8 |
GPIO base +
| Read | 8 |
| GPIOPeriphID2 | Peripheral identification register bits 23:16 |
GPIO base +
| Read | 8 |
| GPIOPeriphID3 | Peripheral identification register bits 31:24 |
GPIO base +
| Read | 8 |
| GPIOPCellID0 | PrimeCell identification register bits 7:0 |
GPIO base +
| Read | 8 |
| GPIOPCellID1 | PrimeCell identification register bits 15:8 |
GPIO base +
| Read | 8 |
| GPIOPCellID2 | PrimeCell identification register bits 23:16 |
GPIO base +
| Read | 8 |
| GPIOPCellID3 | PrimeCell identification register bits 31:24 |