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3.3.5. Interrupt event register, GPIOIEV

The GPIOIEV register is the interrupt event register. Bits set to HIGH in GPIOIEV configure the corresponding pin to detect rising edges or high levels, depending on the corresponding bit value in GPIOIS. Clearing a bit configures the pin to detect falling edges or low levels, depending on the corresponding bit value in GPIOIS. All bits are cleared by a reset.

Table 3.6 shows the bit assignment of the GPIOIEV register.

GPIOIEV register

Bits

Name

Type

Function

7:0

Interrupt event register

Read/write

Bits set, rising edges, or high levels on corresponding pins trigger interrupts.

Bits cleared, falling edges, or low levels on corresponding pin trigger interrupts.

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