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3.3.3. Interrupt sense register, GPIOIS

The GPIOIS register is the interrupt sense register. Bits set to HIGH in GPIOIS configure the corresponding pins to detect levels. Clearing a bit configures the pin to detect edges. All bits are cleared by a reset.

Table 3.4 shows the bit assignment of the GPIOIS register.

GPIOIS register

Bits

Name

Type

Function

7:0

Interrupt sense register

Read/write

Bits clear, edge on corresponding pin is detected

Bits set, level on corresponding pin is detected

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