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3.2. Summary of PrimeCell GPIO registers

The PrimeCell GPIO registers are shown in Table 3.1.

PrimeCell GPIO register summary

Address

Type

Width

Reset value

Name

Description

GPIO base +

0x000 to

GPIO base + 0x3FC

Read/write

8

0x00

GPIODATA

PrimeCell GPIO data register

GPIO base +

0x400

Read/write

8

0x00

GPIODIR

PrimeCell GPIO data direction register

GPIO base +

0x404

Read/write

8

0x00GPIOISPrimeCell GPIO interrupt sense register

GPIO base +

0x408

Read/write

80x00

GPIOIBE

PrimeCell GPIO interrupt both edges register

GPIO base +

0x40C

Read/write

8

0x00

GPIOIEV

PrimeCell GPIO interrupt event register

GPIO base +

0x410

Read/write

80x00GPIOIEPrimeCell GPIO interrupt mask

GPIO base +

0x414

Read80x00GPIORISPrimeCell GPIO raw interrupt status

GPIO base +

0x418

Read80x00GPIOMISPrimeCell GPIO masked interrupt status

GPIO base +

0x41C

Write80x00GPIOICPrimeCell GPIO interrupt clear

GPIO base +

0x420

Read/write

80x00GPIOAFSELPrimeCell GPIO mode control select

GPIO base +

0x424-0xFCC

-

-

-

-

Reserved for future use and test purposes

GPIO base +

0xFD0-0xFDC

-

-

-

-

Reserved for future ID expansion

GPIO base +

0xFE0

Read

8

0x61

GPIOPeriphID0

Peripheral identification register bits 7:0

GPIO base +

0xFE4

Read

8

0x10

GPIOPeriphID1

Peripheral identification register bits 15:8

GPIO base +

0xFE8

Read

8

0x04

GPIOPeriphID2

Peripheral identification register bits 23:16

GPIO base +

0xFEC

Read

8

0x00

GPIOPeriphID3

Peripheral identification register bits 31:24

GPIO base +

0xFF0

Read

8

0x0D

GPIOPCellID0

PrimeCell identification register bits 7:0

GPIO base +

0xFF4

Read

8

0xF0

GPIOPCellID1

PrimeCell identification register bits 15:8

GPIO base +

0xFF8

Read

8

0x05

GPIOPCellID2

PrimeCell identification register bits 23:16

GPIO base +

0xFFC

Read

8

0xB1

GPIOPCellID3

PrimeCell identification register bits 31:24

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