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3.3.27. c11, DMA Channel Number Register

The purpose of the DMA Channel Number Register is to select a DMA channel, or to find which DMA channel is currently selected.

The DMA Channel Number Register is:

  • in CP15 c11

  • a 32-bit read/write register

  • accessible in User and privileged modes

Figure 3.53 shows the arrangement of bits in the register.

Figure 3.53. DMA Channel Number Register format

Figure 3.53. DMA Channel Number Register format

Table 3.113 shows the bit functions of the DMA Channel Number Register.

Table 3.113. DMA Channel Number Register bit functions
Bit rangeField nameFunction
[31:1]-

UNP/SBZ.

[0]CN

Channel Number: Indicates DMA Channel selected:

0 = DMA Channel 0 selected, reset value

1 = DMA Channel 1 selected.


The Enable, Control, Internal Start Address, External Start Address, Internal End Address, Channel Status, and Context ID registers are multiple registers with one instance of each register for each DMA channel that is implemented. The value contained in the DMA Channel Number Register determines which of the multiple registers is accessed when one of these registers is specified.

Accessing the DMA Channel Number Register

Table 3.114 shows the results of attempted accesses to the DMA Channel Number Register for each mode.

Table 3.114. Results of accesses to the DMA Channel Number Register
Privileged readPrivileged writeUser readUser write
Data readData writeData read[a]Data write[a]

[a] Accesses from User mode will succeed if at least one of the U bits is set in the DMA User Accessibility Register. If no U bit is set these operations will result in an Undefined Instruction Trap. See c11, DMA User Accessibility Register for more information.


To access the DMA Channel Number Register you read or write CP15 with:

  • Opcode_1 set to 0

  • CRn set to c11

  • CRm set to c2

  • Opcode_2 set to 0.

For example:

MRC p15, 0, <Rd>, c11, c2, 0            ; Read DMA Channel Number Register
MCR p15, 0, <Rd>, c11, c2, 0            ; Write DMA Channel Number Register