Each implemented DMA channel has its own DMA Internal Start Address Register. The purpose of each DMA Internal Start Address Register is to define the first address in the TCM for that channel. That is, it defines the first address that data transfers go to or from.
The DMA Internal Start Address Registers are:
in CP15 c11
one 32-bit read/write register for each DMA channel
accessible in User and privileged modes
a DMA Internal Start Address Register is only accessible in User mode if the U bit of the currently selected DMA channel is set to 1 in the DMA User Accessibility Register, see c11, DMA User Accessibility Register for details.
The DMA Internal Start Address Register bits [31:0] contain the Internal Start Virtual Address (VA).
The value held in the DMA Channel Number Register determines whether the channel 0 or the channel 1 DMA Internal Start Address Register will be accessed. See c11, DMA Channel Number Register for details.
Table 3.115 shows the results of attempted accesses to a DMA Internal Start Address Register for each mode.
|U bit[a]||Privileged read||Privileged write||User read||User write|
|0||Data read||Data write||Undefined Instruction exception||Undefined Instruction exception|
|1||Data read||Data write||Data read||Data write|
To access a DMA Internal Start Address Register you:
Write to the DMA Channel Number Register to select the DMA channel you want to access, see c11, DMA Channel Number Register.
Write CP15 with:
Opcode_1 set to 0
CRn set to c11
CRm set to c5
Opcode_2 set to 0.
MRC p15, 0, <Rd>, c11, c5, 0 ; Read DMA Internal Start Address Register
MCR p15, 0, <Rd>, c11, c5, 0 ; Write DMA Internal Start Address Register
The Internal Start Address is a Virtual Address (VA). Page tables describe the physical mapping of the VA when the channel starts.
The memory attributes for that Virtual Address are used in the transfer, so memory permission faults might be generated. The Internal Start Address must lie within a TCM, otherwise an error is reported in the DMA Channel Status Register. The marking of memory locations in the TCM as being Device results in Unpredictable effects.
The contents of this register are Unpredictable while the DMA channel is Running. When the channel is stopped because of a Stop command, or an error, it contains the address required to restart the transaction. On completion, it contains the address equal to the Internal End Address.
The Internal Start Address must be aligned to the transaction size set in the DMA Control Register or the effects are Unpredictable.
Attempting to write a DMA Internal Start Address Register while the currently selected DMA channel is Running or Queued has no effect. That is, the operation fails without issuing an error.