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3.3.26. c11, DMA User Accessibility Register

The purpose of the DMA User Accessibility Register is to determine if a User mode process can access the DMA registers for each channel.

The register holds a U bit for each channel, that indicates if the registers for that channel can be accessed by a User mode process.

The DMA User Accessibility Register is:

  • in CP15 c11

  • a 32-bit read/write register

  • accessible in privileged mode only.

Figure 3.52 shows the arrangement of bits in the register.

Figure 3.52. DMA User Accessibility Register format

Figure 3.52. DMA User Accessibility Register format

Table 3.111 shows the bit functions of the DMA User Accessibility Register.

Table 3.111. DMA User Accessibility Register bit functions
Bit rangeField nameFunction
[31:2]-

UNP/SBZ

[1]U1

Indicates if a User mode process can access the registers for channel 1:

0 = User mode cannot access channel 1 registers. The DMA transfer type is privileged, indicated by HPROTD[1] asserted. This is the reset value.

1 = User mode can access channel 1 registers. The DMA transfer type is User, indicated by HPROTD[1] deasserted.

[0]U0

Indicates if a User mode process can access the registers for channel 0:

0 = User mode cannot access channel 0 registers. The DMA transfer type is privileged, indicated by HPROTD[1] asserted. This is the reset value.

1 = User mode can access channel 0 registers. The DMA transfer type is User, indicated by HPROTD[1] deasserted.


The following sections describe the registers that can be accessed from User mode if the U bit for that channel is 1:

The contents of these registers must be preserved on a task switch if the registers are User-accessible.

You can access the DMA channel Number Register in User mode when the U bit for any channel is 1. For more information see c11, DMA Channel Number Register.

If the U bit for a channel is set to 0, then attempting to access the registers for that channel from a User process results in an Undefined Instruction trap.

Accessing the DMA User Accessibility Register

Table 3.112 shows the results of attempted accesses to the DMA User Accessibility Register for each mode.

Table 3.112. Results of accesses to the DMA User Accessibility Register
Privileged readPrivileged writeUser read or write
Data readData writeUndefined Instruction exception

To access the DMA User Accessibility Register you read or write CP15 with:

  • Opcode_1 set to 0

  • CRn set to c11

  • CRm set to c1

  • Opcode_2 set to 0.

For example:

MRC p15, 0, <Rd>, c11, c1, 0            ; Read DMA User Accessibility Register
MCR p15, 0, <Rd>, c11, c1, 0            ; Write DMA User Accessibility Register