The purpose of the Fault Address Register (FAR) is to hold the Modified Virtual Address (MVA) of the access being attempted when a fault occurred.
The Fault Address Register is:
in CP15 c6
a 32-bit read/write register
accessible in privileged mode only.
The FAR is only updated for precise data faults, not for imprecise data faults or prefetch faults. Register bits[31:0] contain the MVA on which the precise abort occurred. The register reset value is 0.
Table 3.67 shows the results of attempted accesses to the Fault Address Register for each mode.
|Privileged read||Privileged write||User read or write|
|Data read||Data write||Undefined Instruction exception|
To access the Fault Address Register (FAR) you read or write CP15 with:
Opcode_1 set to 0
CRn set to c6
CRm set to c0
Opcode_2 set to 0.
MRC p15, 0, <Rd>, c6, c0, 0 ; Read Fault Address Register
MCR p15, 0, <Rd>, c6, c0, 0 ; Write Fault Address Register
Writing CP15 c6 with Opcode_2 set to 0 sets the FAR to the value of the data written. This is useful for a debugger to restore the value of the FAR.
The ARM1136JF-S processor also updates the FAR when a watchpoint causes a debug exception entry. This is architecturally Unpredictable. See Effect of a debug event on CP15 registers for more details.