The ARM1136JF-S processor has six functional clock inputs. These are paired into three clock domains. Externally to ARM1136JF-S, you must connect together CLKIN and FREECLKIN. The same is true of:
HCLKIRW and FREEHCLKIRW
HCLKPD and FREEHCLKPD.
For information on how the clock domains are implemented see the ARM1136JF-S and ARM1136J-S Implementation Guide.
For the purposes of this chapter, you can ignore FREECLKIN, FREEHCLKIRW, and FREEHCLKPD clock domains. Table 9.1 shows the logical clock domains.
|Peripheral port DMA port||HCLKPD||PD|
Instruction Fetch port
Data Read port
Data Write port
All clocks can be stopped indefinitely without loss of state.
You can preconfigure the ARM1136JF-S processor so that each AHB interface clock domain operates synchronously or asynchronously to the core clock domain.