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B.5. Connecting the ETB in a 64-bit AHB system

The ETB AHB interfaces are 32-bits wide, and cannot therefore be directly connected to a 64 bit AHB bus, such as that used in the ARM10 processor systems. A simple bridge can be constructed that replicates the data on both halves of the bus, as described in the AMBA specification. The verilog code shown in Example B.1 demonstrates how this can be done:

// Logic to multiplex the 64-bit AHB bus to a 32-bit bus for 32-bit devices
always @(posedge HCLK)
        HWDATAMEMSelect <= 1'b0;
    else if(HREADY)
        HWDATAbusSelect <= HADDR[2];

assign HWDATAMEM32 = HWDATAMEMSelect ? HWDATAMEM[63:32] : HWDATAMEM[31:0];

// Recreate the 64-bit bus from the 32-bit Trace Buffer HRDATA bus

If the code shown in Example B.1 is used then load/store multiple instructions that access the ETB have unpredictable results because these use both halves of the 64 bit bus at the same time. These accesses do not cause an AHB ERROR response, which normally cause a data abort, so the error is not seen by the system. To remain compatible with these systems, load/store multiple instructions are not permitted when accessing the ETB to retrieve trace information (see Restrictions on use of the AHB interface).

This scheme can only be used when the trace RAM is only to be used for tracing. If the trace RAM is to be used as system memory then a full downsizer must be used that bridges between 64-bit and 32-bit AHB buses, and convert a single 64-bit transfer into two 32-bit transfers. This is planned as part of a future release of the AMBA Design Kit (ADK).

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