You copied the Doc URL to your clipboard.

A.7. Miscellaneous debug signals

Table A.8 shows the miscellaneous debug signals.

Miscellaneous debug signals
SignalI/OResetDescription
COMMRXO1'b0

Receive portion of Data Transfer Register full flag:

0 = empty

1 = full.

COMMTXO1'b0

Transmit portion of Data Transfer Register empty flag:

0 = full

1 = empty.

DBGACKO1'b0

EDBGRQ acknowledge:

0 = external debug request not acknowledged

1 = external debug request acknowledged.

DBGNOCLKSTOPI-Debug clock control signal: 0 = debug disabled while in WFI low-power state 1 = debug enabled while in WFI low-power state.
DBGROMADDR[31:12]I-

Debug ROM base address.

This pin is only sampled during reset of the processor.

DBGROMADDRVI-

Debug ROM base address valid:

0 = address not valid

1 = address valid.

This pin is only sampled during reset of the processor.

DBGSELFADDR[31:12]

I

-

Debug port base address.

This pin is only sampled during reset of the processor.

DBGSELFADDRVI-

Debug port base address valid bit:

0 = address not valid

1 = address valid.

This pin is only sampled during reset of the processor.

EDBGRQI-

External debug request:

0 = no external debug request

1 = external debug request.

The processor treats the EDBGRQ input as level sensitive. The EDBGRQ input must be asserted until the processor asserts DBGACK.

DBGENI-

Invasive debug enable:

0 = not enabled

1 = enabled.

DBGOSLOCKINITI-

Reset value for the OS lock:

0 = not locked

1 = locked.

This pin is only sampled during reset of the processor.

DBGNOPWRDWNO1'b0

No power down:

0 = do not save state of debug registers

1 = save state of debug registers.

DBGPWRDWNREQI-

Processor power-down request:

0 = no request for processor power down

1 = request for processor power down.

ETMPWRDWNREQ[1]I-

ETM power-down request:

0 = no request for ETM power down

1 = request for ETM power down.

DBGPWRDWNACKO1'b0Processor power-down acknowledge 0 = no acknowledge for processor power-down request 1 = acknowledge for processor power-down request.
ETMPWRDWNACK[1]O1'b0ETM power-down acknowledge 0 = no acknowledge for ETM power-down request 1 = acknowledge for ETM power-down request.
NIDENI-

Noninvasive debug enable:

0 = not enabled

1 = enabled.

SPIDENI-

Secure privileged invasive debug enable:

0 = not enabled

1 = enabled.

SPNIDENI-

Secure privileged noninvasive debug enable:

0 = not enabled

1 = enabled.

[1] This signal is not present when the processor is configured with the ETM.

Was this page helpful? Yes No