This section gives an overall view of the system control coprocessor. See System control coprocessor registers for detail of the registers in the system control coprocessor.
The purpose of the system control coprocessor, CP15, is to control and provide status information for the functions implemented in the processor. The main functions of the system control coprocessor are:
overall system control and configuration
cache configuration and management
Memory Management Unit (MMU) configuration and management
preloading engine for L2 cache
system performance monitoring.
The system control coprocessor does not exist in a distinct physical block of logic.
The following CP15 instructions are valid NOP instructions:
MCR p15, 0, <Rd>, c7, c0, 4 ; NOP (wait-for-interrupt, replaced by WFI
At reset, the following CP15 instructions are valid NOP instructions. This behavior is strongly recommended for best performance. Following reset, software can configure the instructions to operate in the traditional manner by programming the Auxiliary Control Register. See c1, Auxiliary Control Register for more details.
MCR p15, 0, <Rd>, c7, c5, 6 ; NOP (invalidate entire branch predictor array)
MCR p15, 0, <Rd>, c7, c5, 7 ; NOP (invalidate branch predictor array line by