The purpose of the Context ID Register is to provide information on the current ASID and process ID, for example for the ETM and debug logic.
Debug logic uses the ASID information to enable process-dependent breakpoints and watchpoints. The ASID field of the Context ID Register and FCSE PID Register cannot be used simultaneously. The FCSE PID Register remapping of VA to MVA has priority over setting the ASID field to designate non-global pages. Therefore, non-global pages cannot be used if the FCSE PID Register is set to a non-zero value.
The Context ID Register is:
a read/write register banked for Secure and Nonsecure states
accessible in privileged modes only.
Figure 3.66 shows the bit arrangement of the Context ID Register.
Table 3.144 shows how the bit values correspond with the Context ID Register functions.
Extends the ASID to form the process ID and identifies the current process. The reset value is 0.
Holds the ASID of the current process to identify the current ASID. The reset value is 0.
Table 3.145 shows the results of attempted access for each mode.
|Secure privileged||Nonsecure privileged||Secure User||Nonsecure User|
|Secure data||Secure data||Nonsecure data||Nonsecure data||Undefined||Undefined||Undefined||Undefined|
The current ASID value in the Context ID Register is exported to the MMU.
To access the Context ID Register, read or write CP15 with:
MRC p15, 0, <Rd>, c13, c0, 1 ; Read Context ID Register
MCR p15, 0, <Rd>, c13, c0, 1 ; Write Context ID Register
You must ensure that software executes a Data Synchronization Barrier operation before changes to this register. This ensures that all accesses are related to the correct context ID.
You must execute an IMB instruction immediately after changes to the Context ID Register. You must not attempt to execute any instructions that are from an ASID-dependent memory region between the change to the register and the IMB instruction. Code that updates the ASID must execute from a global memory region.
You must program each process with a unique number to ensure that the ETM and debug logic can correctly distinguish between processes.