The purpose of the Instruction Set Attributes Register 3 is to provide information about the instruction set that the processor supports beyond the basic set.
The Instruction Set Attributes Register 3 is:
a read-only registers common to the Secure and Nonsecure states
accessible in privileged modes only.
Figure 3.14 shows the bit arrangement of Instruction Set Attributes Register 3.
Table 3.33 shows how the bit values correspond with the Instruction Set Attributes Register 3 functions.
Thumb2 executable environment
Indicates support for Thumb2 Executable Environment Extension instructions:
Indicates support for
Indicates support for Thumb copy instructions:
Indicates support for table branch instructions:
Indicates support for synchronization primitive instructions.
Indicates support for SVC instructions:
Indicates support for Single Instruction Multiple Data (SIMD) instructions.
Indicates support for saturate instructions:
Table 3.34 shows the results of attempted access for each mode.
|Secure privileged||Nonsecure privileged||Secure User||Nonsecure User|
 An entry of Undefined in the table means that the access gives an Undefined Instruction exception when the coprocessor instruction is executed.
To access the Instruction Set Attributes Register 3, read CP15 with:
MRC p15, 0, <Rd>, c0, c2, 3 ; Read Instruction Set Attributes Register 3